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Silicon wafers and supports

Polished silicon is an excellent substrate for imaging experiments, nanotechnology and micro-fabrication applications. For imaging applications, it is an ideal sample substrate for small particles due to the low background signal of the highly polished surface. For biological applications silicon resembles glass, which makes it a suitable support for growing and/or mounting cells.

The silicon wafers and chips are all P-type, doped with B to provide excellent conductivity for SEM, FIB and STM applications. It is available as wafers, diced wafers or as smaller chips (pieces). The silicon wafer and chips all have a <100> orientation. Cleaving of the wafers to the desired size with a <100> orientation wafers is straight forward and simple.

Two grades of silicon substrates are offered:

We also offer a range of wafer holders  for using wafers in all brands of SEM. Our wafer carrier trays provide protection for wafers during storage.

For precise breaking of silicon wafers we also offer Wafer cleaving pliers.

 

Micro-Tec silicon wafer substrates from Micro to Nano are a useful flat substrate for SEM imaging of particles due to the low background and can also be used as sample substrates, micro-fabrication, substrate for thin film research or biological substrates. Micro-Tec Si wafers are packed in a wafer carrier tray for protection. The diced wafer supplied on wafer adhesive disc and packed between two plastic sheets for protection. The Si chips can be easily lift off the adhesive sheet.


Micro-Tec standard silicon wafer substrates are available as:

  • Ø2”/51mm silicon wafers
  • Ø4”/100mm silicon wafers
  • Ø6”/150mm silicon wafers
  • Diced Ø4”/100mm silicon wafer in 5x5mm chips (~270 pieces)

Nano-Tec, ultra-flat P silicon wafers have higher specifications than Micro-Tec silicon wafers. They are preferred for demanding applications in micro-fabrication, as substrates for thin film research or biological substrates. The larger wafers with the <100> orientation can be easily cleaved to the desired size. Ultra-flat Nano-Tec Si wafers are clean-room packed in a wafer carrier tray for protection. The ultra-flat Si chips are precision diced with a dicing saw, cleaned and clean-room packed in a gel-box. They can be easily lift off the gel substrate with flat tipped tweezers.

Nano-Tec ultra-flat silicon wafers are available as:

  • Ø4”/100mm <P/100> ultra-flat silicon wafers
  • Ø6”/150mm <P/100> ultra-flat silicon wafers
  • Ultra-flat 5x5mm Si chips;  25 packaged in a gel box
  • Ultra-flat 5x5mm Si chips with 200nm thermal SiO2; 25 packaged in a gel box

Silicon wafers

Diced Silicon wafers

For specifications please see adjacent TABS

Parameter

Ø2”/51mm wafer

Ø4”/100mm wafer

Ø6”/150mm wafer

Diced Ø4”/100mm

Product #

10-008120

10-008140

10-008160

10-008145

Orientation

<100>

Type

P (Boron) with one primary flat

Resistance

1-30 Ohm/cm

Coating

None, native oxide only

Thickness

275µm (+/- 20µm)

525µm (+/- 20µm)

675µm (+/- 20µm)

525µm (+/- 20µm)

Diameter

51mm

100mm

150mm

100mm

Chip (die) size

n.a.

n.a.

n.a.

5x5mm

Chip quantity

n.a.

n.a.

n.a.

 ~270

TTV

≤ 20µm

Primary flat

15.9 +/- 1.65mm

32.5 +/- 2.5mm

57.5 +/- 2.5mm

32.5 +/- 2.5mm

Surface roughness

<1.5nm, polished on one side

Parameter

Ø4”/100mm wafer

Ø6”/150mm wafer

5 x 5mm chips

5x5mm chips with thermal SiO2

Product #

10-008141

10-008161

10-008150

10-008155

Orientation

<100>

Type

P (Boron) with one flats

Resistance

1-10 Ohm/cm

Grade

Prime / CZ Virgin

Coating

None, native oxide only

Thermal SiO2

Thickness

525µm (+/- 20µm)

675µm (+/- 20µm)

Diameter

100mm

150mm

150mm

150mm

Chip size

n.a.

n.a

5x5mm

5x5mm

Chips quantity

n.a.

n.a.

25

25

TTV

≤1.5µm

Bow

≤30µm

Warp

≤30µm

Primary flat

 32.5 +/- 2.5mm

57.5 +/- 2.5mm

Surface roughness

Typically 0.2- 0.3nm, polished one side

Ordering information: